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Si6966EDQ
Vishay Siliconix
SPECIFICATIONS T J = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current a
V GS(th)
I GSS
I DSS
I D(on)
V DS = V GS , I D = 250 μA
V DS = 0 V, V GS = ± 4.5 V
V DS = + 20 V, V GS = 0 V
V DS = 20 V, V GS = 0 V, T J = 55 °C
V DS ≥ 5 V, V GS = 4.5 V
0.6
30
± 100
1
25
V
nA
μA
A
Drain-Source On-State Resistance a
Forward Transconductance a
R DS(on)
g fs
V GS = 4.5 V, I D = 5.2 A
V GS = 2.5 V, I D = 4.5 A
V DS = 10 V, I D = 5.2 A
0.021
0.028
20
0.030
0.040
Ω
S
Diode Forward Voltage
a
V SD
I S = 1.25 A, V GS = 0 V
0.65
1.2
V
Dynamic b
Total Gate Charge
Q g
15
25
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Q gs
Q gd
t d(on)
t r
V DS = 15 V, V GS = 4.5 V, I D = 5.2 A
V DD = 10 V, R L = 10 Ω
2.5
4.5
100
130
200
250
nC
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
t d(off)
t f
t rr
I D ? 1 A, V GEN = 4.5 V, R G = 6 Ω
I F = 1.25 A, dI/dt = 100 A/μs
420
220
210
800
450
500
ns
Notes:
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
Document Number: 70809
S-81221-Rev. C, 02-Jun-08
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